Intel to Create RISC-V Improvement Platform with SiFive P550 Cores on 7nm in 2022

As a part of SiFive’s bulletins at the moment, together with enabling SiFive IP on Intel’s Foundry Service choices, Intel might be creating its personal RISC-V growth platform utilizing its 7nm course of expertise. This platform, known as Horse Creek, will function a number of of SiFive’s new Efficiency P550 cores additionally being introduced at the moment, and might be paired with Intel’s DDR and PCIe IP expertise.

On first studying into the press launch, it isn’t 100% clear that Intel’s commentary discusses a platform with P550 as a bunch or as an add-in machine: to cite Intel, ‘We’re happy to be a lead growth companion with SiFive to showcase to mutual prospects the spectacular efficiency of their P550 on our 7nm Horse Creek platform’. Intel traditionally usually retains its Creek household names, equivalent to Boulder Creek, Cherry Creek, or Timber Creek, for socketed platforms – not for all-in-one embedded growth platforms. Not solely that, the wording makes it sound like we must always contemplate a RISC-V core as an assistant core managing one other a part of a system.

Nonetheless it will seem that Intel intends to make this a fully-featured growth system, alongside related strains to SiFive’s personal HiFive Unmatched platform launched early this yr. What makes this particular is that Intel is committing to growing the SoC by itself 7nm course of node, which supplies a ‘easier’ automobile for Intel to check and ramp up its 7nm expertise. This may be coupled with growing curiosity in RISC-V growth, and deploying a platform although Intel’s provide chain and distribution may need a far attain to place these within the arms of upcoming builders.

The brand new SiFive Efficiency P550 core on the coronary heart of Horse Creek is SiFive’s highest efficiency processor up to now, with the corporate quoting a SPEC2006int of 8.65 per GHz. It’s a Linux-capable core, with full help for the RISC-V vector extension v1.0rc. It has a 13-stage triple-issue out-of-order microarchitecture with a non-public 32KB+32KB L1 cache and a non-public L2 cache (per core) The design helps 4 cores in a single cluster that may be paired as much as 4 MB of shared L3.

The time scale for this platform coming to market is kind of attention-grabbing. Regardless of Intel lately dedicated to bringing its 7nm to market in 2023 with the compute tile for its Meteor Lake processor as its first 7nm product, we’re being informed that Horse Creek silicon might be prepared in 2022, which might make Horse Creek its first 7nm product. For what it’s value, it’s unlikely that the Intel RISC-V answer is tile-based, nevertheless it is likely to be simple sufficient to carry a small RISC-V chip growth platform to market round then. The chip is more likely to be small, so which may work in favor of its prices as properly. A query does stay as as to whether Intel’s involvement right here is only within the {hardware}, or whether or not there might be an Intel-based software program stack to go together with it.

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